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DIMMs must be populated into a balanced configuration to yield the highest and most consistent memory bandwidth with the lowest memory access latency. Various factors dictate whether a configuration is balanced or not. For best results, follow these guidelines:
Each memory channel must be fully populated with one or two DIMMs for best performance; a total of eight or sixteen DIMMs per CPU.
Each memory controller must be populated with at least one DIMM in a symmetrical fashion: a total of four, six, twelve or fourteen DIMMs per CPU. DIMMs must be populated in sequential order starting from A1-A16.
‘Symmetrical’ refers to two memory channels that are horizontally flipped.